This invention relates to a semiconductor device applicable to a pressure sensor, an accelerometer or the like having a temperature compensating function.
For example, Japanese Patent Kokai No. 62-213280 discloses a semiconductor accelerometer having a temperature compensation function. The semiconductor accelerometer includes a silicon substrate having an aperture to form an accelerometer cantilever having a weight integral therewith, and a temperature compensating cantilever located on one side of the accelerometer cantilever. First and second piezo resistors are formed in the accelerometer cantilever adjacent its root for detecting the degree of deflection of the accelerometer cantilever. Third and fourth piezo resistors are formed in the temperature compensating cantilever adjacent its root. The four piezo resistors, which have resistances dependent upon temperature, are connected in a bridge circuit having a first pair of opposite arms comprised of the first and second piezo resistors, respectively, and a second pair of opposite arms comprised of the third and fourth piezo resistors, respectively, so that the second and fourth piezo resistors can provide temperature compensation for the first and second piezo resistors to provide accurate acceleration measurements over a wide temperature range.
One difficulty associated with the conventional semiconductor accelerometer is that the third and fourth piezo resistors have resistances deviated from those of the first and second piezo resistors to cancel the temperature compensating effect. The resistances of the piezo resistors are determined by the resistance distribution in a semiconductor wafer from which the sensor chip is cut. The cantilevers are required to have a width of several hundreds of .mu.m and to be spaced at a distance of several tens of .mu.m from each other. For this reason, the distance between the piezo resistors provided on the two cantilevers is as far as several hundreds of .mu.m. This distance is sufficient to differ the resistances of the third and fourth piezo resistors from those of the first and second piezo resistors.